LogicLab
is a IEC 61131-3 PLC compiler that
supports all 5 programming languages of the IEC 61131-3 standard, It's fully
free. Easy-to-use textual and graphic editors, extended drag & drop
functions applying to all contexts of the framework, various integrated textual
and graphic debuggers make LogicLab an efficient development environment
and a particularly user-friendly program.
The LogicLab's compiler generates directly the machine code for the target
processor, guaranteeing high speed execution time.
The tool has been developed by Axel, an italian Company with multiyear experience
in industrial automation software production, and customized to be used
with the programmable controllers of SlimLine series.
| Features |
| Supported devices |
SLine
ARM7 CPU |
| Supported languages |
All 5 IEC1131-3 languages:
Ladder Diagram (LD), Function Block Diagram (FBD),
Instruction List (IL), Structured Text (ST),
Sequential Function Chart (SFC). |
| Editing |
- Integrated text and graphic editors,
- Intellisense Function,
- Source document
print supported,
- Global search through the entire project Libraries (create,
import, reuse code blocks),
- Menus and messages in English and Italian.
|
| Communication interface |
Connection to CPU board through
RS232 standard serial cable at a typical baud rate of 38400 bit/s, or
through Ethernet network interface. |
| On-line functionality |
- Direct interface to system global variables,
- Textual
and graphic monitor of project variables,
- Textual and graphic real-time
debuggers,
- In textual languages, support
to display of the index of the currently executed source line,
- In graphic
languages, support to display of currently active blocks.
|
| Technical support |
- Online help i English (you can download it for free
from the download area of our web site),
- Large knowledge base, available
on Internet, with information on how to use the product, version history,
notes on existing bugs (and possibly some advice on how to work them
around),
- Discussion Forum.
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